1. Field of the Invention
The present invention relates to a plasma display device and a driving apparatus thereof.
2. Description of the Related Art
A plasma display device is a flat panel display device that uses plasma generated by a gas discharge to display characters or images. It includes a plasma display panel (PDP) having hundreds of thousands to millions of discharge cells (hereinafter referred to as cells) arranged in a matrix format, depending on its size.
According to a conventional driving method of a plasma display device, each frame is divided into a plurality of subfields having respective weights (or brightness weights), and gray levels are expressed by a combination of weights from among the subfields, which are used to perform a display operation. Each subfield is divided into a reset period, an address period, and a sustain period and is driven in the periods. Wall charge states of discharge cells are initialized in the reset period, turn-on cells are selected in the address period, and a sustain discharge operation is performed in the turn-on cells for displaying an image (e.g., a substantial image) in the sustain period.
A conventional plasma display device applies a voltage that is higher than a scan voltage to a scan electrode at the end of a reset period by using the scan voltage applied to the scan electrode for selecting turn-on cells during an address period. A driving circuit used for this process will be described with reference to FIG. 1.
FIG. 1 shows a part of a conventional driving apparatus of a plasma display device that drives a scan electrode.
As shown in FIG. 1, the driving apparatus 10 includes a transistor YscL, a Zener diode ZD1, and a transistor Yfr. A drain of the transistor YscL is coupled to a scan electrode Y, a source of the transistor YscL is coupled to a power source VscL, a cathode of the Zener diode ZD1 is coupled to the scan electrode Y, and an anode of the Zener diode ZD1 is coupled to a drain of the transistor Yfr. A drain of the transistor Yfr is coupled to the Zener diode ZD1 and the source of the transistor Yfr is coupled to the power source (e.g., voltage source) VscL.
At the end of the reset period, the transistor Yfr is turned on and the transistor YscL is turned off. Accordingly, a current path is formed from the scan electrode Y through the Zener diode ZD1 and the transistor Yfr to the power source VscL, and a voltage applied to the scan electrode Y is maintained higher than a voltage of VscL at the power source VscL by a constant level ΔV due to the Zener diode ZD1.
In an address period, the transistor Yfr is turned off and the transistor YscL is turned on. Accordingly, a current path is formed from the scan electrode Y through the transistor YscL to the power source VscL, and a voltage applied to the scan electrode corresponds to the VscL voltage.
In general, the VscL voltage is set to about −200 V, and the constant level ΔV is set to about 25 V. Therefore, the Zener diode ZD1 has a high withstand voltage of about 175V. However, the use of the Zener diode having such a high withstand voltage has drawbacks of increased implementation costs as well as power consumption.
In addition, in the conventional driving apparatus 10 of FIG. 1 a size of ΔV cannot be modified. As such, it cannot correspond to design compatibility of a plasma display device and a variation range according to a discharge margin, and a voltage of the scan electrode may be decreased to a voltage level that is lower than a voltage (e.g., a predetermined voltage) due to noise and errors in a control device.
The above information disclosed in this Background section is only for enhancement of understanding of the background of the present invention, and therefore it may contain information that does not form the prior art that is already known in this country to a person of ordinary skill in the art.